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The Sega NAOMI (short for New Arcade Operation Machine Idea) is an arcade system board released in 1998. It was designed as the successor to the Sega Model 3 hardware, with an architecture similar to the Sega Dreamcast.

HistoryEdit

The NAOMI was first demonstrated at the 1998 Amusement Machine Show hosted by JAMMA, at a time when traditional arcades were on a decline. It was engineered to be a mass-produced, cost-effective machine reliant on large game ROM cartridges that can be interchanged by the arcade operator. This was contrary to system boards such as the Sega Model 3, in which each board, despite sharing largely the same specifications, would be bespoke, with the built-in ROMs being flashed with games during the manufacturing process. This was not the first time that such an idea was utilized by Sega, but never before had technology been used for a cutting-edge Sega arcade specification.

Unlike most arcade system board hardware platforms in the industry at the time, the NAOMI was widely licensed for use by other manufacturers, many of which are former rivals to Sega, such as Taito, Capcom, and Namco. It was also one of the longest-serving arcade system boards, having seen support from 1998 to 2009.

IkarugaEdit

The NAOMI is the hardware on which the arcade version of Ikaruga is run. The game was produced in both the standard NAOMI game cartridge format and the NAOMI GD-ROM format.

Technical SpecificationsEdit

NAOMIEdit

  • Board Composition: Motherboard, Internal ROM Board, Filter Board
    • 1999 revision: Motherboard, Internal ROM Board, Filter Board, I/O Board
  • Operating system(s):
    • Sega native OS
    • Custom variation of Windows CE, with DirectX 6.0, Direct3D, and OpenGL support
  • Main CPU: Hitachi SH-4 @ 200 MHz
    • Units: 128‑bit SIMD vector unit with graphic functions, 64‑bit floating‑point unit, 32‑bit fixed‑point unit
    • Bus width: 128‑bit internal, 64‑bit external
    • Bandwidth: 3.2 GB/s internal, 1.6 GB/s external
    • Fixed‑point performance: 360 MIPS
    • Floating‑point performance: 1.4 GFLOPS
  • MCU
    • Main MCU: Sega Custom Z80 @ 21.333 MHz (8/16‑bit instructions @ 3.093 MIPS)
    • I/O Board MCU: Toshiba TMP90PH44 @ 14.745 MHz (8‑bit instructions @ 3.68625 MIPS)
    • Optional cartridge MCU: Microchip PIC12C508A/PIC16C621A @ 4/40 MHz (8‑bit RISC instructions @ 1/5 MIPS)
  • FPGA: 2× FPGA
    • Altera FLEX EPF8452AQC160‑3 FPGA @ 125 MHz
    • Sega 315‑6188 (Altera EPC1064PC8) FPGA Configuration Device @ 6&nbsp


  • GPU: 2 core processors (SH‑4 SIMD, PowerVR2)
    • Cores: 6 cores (SH‑4 SIMD, 5 PowerVR2 cores)
  • GPU geometry processor: Hitachi SH-4 SIMD @ 200 MHz
  • GPU rasterizer: NEC-VideoLogic PowerVR2 @ 100 MHz
    • Revision: Newer revision of PowerVR2 used in NAOMI systems (after The House of the Dead 2), rendering performance doubled
    • Cores: TA (Tile Accelerator), 2x ISP (Image Synthesis Processors), TSP (Texture & Shading Processor), Triangle Setup FPU, RAMDAC
      • Units: 88 rendering units (74 ISP units, 10 TSP units, 3 FPU units, 1 RAMDAC)
    • ISP units: 2x ISP Precalc Units, 2x ISP PE Arrays (64 PE processor elements), 2x Depth Accumulation Buffers, 2x Span RLC, 2x Span Sorters, 2x ISP Parameter Cache
    • TSP units: TSP Precalc, Parameter Cache, Texture Cache, Iterator Array, Pixel Processing Engine, Tile Accumulation Buffer, Secondary Accumulation Buffer, Combine & Bump Map Unit, Fog Unit, Alpha Blending Unit
    • Triangle Setup FPU: 3 FPU rendering units, 1 GFLOPS
      • 2x ISP Setup FPU: 100 MHz, 728 MFLOPS, surface and culling processing for polygons, 14,285,714 polygons/sec
      • TSP Setup FPU: 100 MHz, 364 MFLOPS, shading and texture processing for tiles processed by ISP
    • RAMDAC: 230 MHz
    • Buses: 2 buses at 125 MHz, 64-bit TA Bus for transferring polygons and textures (1 GB/s), 32-bit PVRIF Bus for register memory (500 MB/s)
    • Features: Bump mapping, fog, alpha blending, mipmapping, anti-aliasing, environment mapping, specular effects, normal mapping, tiled rendering, deferred rendering, back‑face culling, hidden surface removal.
  • DAC: Sega 315‑6145 (Rohm BU1426KS) @ 35.4695 MHz
    • Bus width: 24‑bit
  • Display resolution: 320×240 to 800×608 pixels, progressive scan, JAMMA/VGA
    • Internal resolution: 320×240 to 1600×1200 pixels
  • Color Depth: 16-bit RGB to 32‑bit ARGB, 65,536 to 16,777,216 colors (24‑bit color) with 8‑bit (256 levels) alpha blending, YUV and RGB color space, color key overlay
  • Framebuffer:
    • Full framebuffer: 320×240×16‑bit (150 KB) to 1600×1200×24‑bit (5625 KB)
    • Strip/Tile buffer: 32×32×16‑bit (4 KB) to 32×32×24‑bit (8 KB)
  • VRAM: 16 MB (effectively up to 42–127 MB with texture compression)
    • Framebuffer: 300–5625 KB (optional), average 1200–1800 KB (640×480, 16/24-bit color, double-buffered)
    • Polygons: Stored in double-buffered display lists, 22 bytes per shaded triangle, 31 bytes per textured triangle, 36 bytes per bump-mapped triangle, 38 bytes per volume-modified triangle, 96 bytes per sprite
    • Textures: 32 KB to 16 MB (effectively 42–127 MB with texture compression), average 5–10 MB (effectively 40–60 MB with texture compression), 32 bytes to 386 KB or 1026 KB per texture
    • VRAM bandwidth: 1 GB/s (effectively up to 3–7 GB/s with texture compression)
    • Note: Main RAM also used to store polygon display lists. Textures transferred directly to VRAM. Textures can be streamed directly from high-speed ROM cartridge. Main RAM can also optionally be used to store textures.
  • Floating point performance: 2.4 GFLOPS
    • SH-4 SIMD: 1.4 GFLOPS geometry
    • PowerVR2: 1 GFLOPS rendering
  • Geometry pipeline: SH‑4 SIMD
    • Geometry bandwidth: 3.2 GB/s
    • Floating‑point performance: 1.4 GFLOPS
  • Rendering fillrate:
    • 6 GPixels/s: Maximum fillrate for opaque polygons
    • 1 GPixel/s: Average fillrate for translucent and opaque polygons
    • 200 MPixels/s: Minimum fillrate for translucent polygons with hardware sort depth of 60
  • Texture fillrate:
    • 6 GTexels/s: Maximum fillrate for opaque polygons
    • 1 GTexel/s: Average fillrate for translucent and opaque polygons
    • 200 MTexels/s: Minimum fillrate for translucent polygons with hardware sort depth of 60
  • SH-4 Polygon T&L Geometry: 1.4 GFLOPS
    • Matrix transformations: 50 million vertices/s
    • Perspective transformations: 16.6 million vertices/sec, 16 million polygons/s
    • 1 light source: 14.2 million vertices/s, 14 million polygons/s
    • 4 light sources: 6.89 million vertices/s, 6.8 million polygons/s
  • CLX2 polygon rendering: Front‑facing polygons drawn on screen, not including overdrawn and back‑facing polygons
    • 16 million vertices/s
    • 14 million polygons/s: Lighting, flat shading
    • 12 million polygons/s: Lighting, texture mapping
    • 10 million polygons/s: Lighting, texture mapping, shadows, modifier volumes
    • 8.3 million polygons/s: Lighting, texture mapping, Gouraud shading, shadows, modifier volumes, bump mapping
    • 8.2 million polygons/s: Lighting, texture mapping, anisotropic filtering
    • 6.2 million polygons/s: Lighting, texture mapping, Gouraud shading, shadows, modifier volumes, bump mapping, anisotropic filtering, translucent polygons
  • 2D sprite capabilities: Sprites rendered as textured translucent quad polygons
    • Colors per sprite: 16 colors (4-bit color) to 16,777,216 colors (24-bit color)
    • Sprite sizes: 8×8 texels (224 bytes) to 1024×1024 texels (386.2 KB)
    • Sprite fillrate: 200 MTexels/s
    • Maximum sprites per frame: 52,083 sprites (8×8, 60 FPS)
    • Maximum texels per scanline: 13,888 texels (60 FPS)
    • Maximum sprites per scanline: 1736 sprites (60 FPS)


  • Sound engine: Yamaha AICA Super Intelligent Sound Processor @ 67 MHz
    • Internal CPU: 32‑bit ARM7 RISC CPU @ 45 MHz
    • CPU performance: 40 MIPS
    • PCM/ADPCM: 16‑bit depth, 48 kHz sampling rate (DVD quality), 64 channels
    • Other features: DSP, sound synthesizer


  • Overall memory: 92 to 506 MB
  • Internal processor cache: 120.076 KB
    • SH4 CPU cache: 25.564 KB
    • PowerVR2 GPU cache: 46 KB
    • AICA audio cache: 32.011 KB
    • I/O Board MCU: 16.5 KB
  • System RAM: 57,408 KB (56.0625 MB)
    • Main RAM: 32 MB SDRAM
    • VRAM: 16 MB SDRAM (unified framebuffer/polygon/texture memory)
    • Sound RAM: 8 MB SDRAM
    • SRAM: 64 KB
  • System ROM: 2048.125 KB (2 MB BIOS EPROM, 128 bytes EEPROM)
  • Cartridge ROM: 34–448 MB
    • Sega 1998/1999 format: 34–184 MB (32–176 MB FlashROM/MROM, 0–4 MB EPROM)
    • Namco 2000 format: 136–400 MB (136–256 MB FlashROM, 0–144 MB MROM)
    • Sega 2005 format: 128–448 MB (128–448 MB FlashROM, 0–40 MB EPROM, 128 KB Flash PROM)
  • Cartridge RAM: 32–64 KB SRAM
  • Optional cartridge MCU memory: 793/1888 bytes (25/96 bytes SRAM, 768/1792 bytes EPROM)


  • Internal processor cache bandwidth:
    • SH4: 3.2 GB/s
    • PowerVR2: 28 GB/s
    • AICA: 256 MB/s
  • RAM/ROM memory bandwidth: 2.636–3.224 GB/s
  • System RAM bandwidth: 2 GB/s
    • Main RAM: 800 MB/s
    • VRAM: 1 GB/s
    • Sound RAM: 132 MB/s
    • SRAM: 44 MB/s
  • System ROM bandwidth: 24 MB/s
    • EPROM: 20 MB/s
    • EEPROM: 4 MB/s
  • Cartridge ROM bandwidth: 612 MB/s to 1.2 GB/s
    • Sega 1998 format: 612 MB/s
    • Sega 1999/2005 format: 900 MB/s
    • Namco 2000 format: 1.2 GB/s
    • Note: High-speed access allows ROM cartridge to effectively be used as RAM.
  • Cartridge RAM bandwidth: 28–100 MB/s

NAOMI GD-ROMEdit

  • Board Composition: Motherboard, Internal ROM Board, Filter Board, I/O Board, DIMM Board
  • Storage: GD-ROM disc drive @ 12× speed, 1 GB per GD-ROM disc
    • GD-ROM transfer rate: 1800 KB/s


  • Memory
    • Overall Memory: 66 to 570 MB
    • System RAM: 57,408 KB (56.0625 MB)
    • Internal processor cache: 107.701 KB
    • System ROM: 2048.125 KB (2.0001 MB)
    • DIMM Board RAM: 8 to 512 MB DIMM SDRAM


  • Bandwidth
    • RAM Bandwidth: 3 GB/s
      • Main RAM: 800 MB/s
      • VRAM: 1 GB/s
      • Sound RAM: 132 MB/s
      • SRAM: 44 MB/s
      • DIMM RAM: 1.064 to 2.128 GB/s

TriviaEdit

  • Naomi is a Japanese name meaning "beauty above all else".

GalleryEdit

External LinksEdit

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